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RELATED DEVICE CODES:

XC4013XLA, XC4020XLA, XC4028XLA, XC4036XLA, XC4044XLA, XC4052XLA, XC4062XLA, XC4085XLA, XC40110XV, XC40150XV, XC40200XV, XC40250XV,

RELATED MODEL NUMBERS:

XC4013XLAPQ160C, XC4013XLAPQ160I, XC4013XLAPQ208C, XC4013XLAPQ208I, XC4013XLAPQ240C, XC4013XLAPQ240I, XC4013XLABG256C, XC4013XLABG256I, XC4013XLAPQ160C, XC4013XLAPQ160I, XC4013XLAPQ208C, XC4013XLAPQ208I, XC4013XLAPQ240C, XC4013XLAPQ240I, XC4013XLABG256C, XC4013XLABG256I, XC4013XLAPQ160C, XC4013XLAPQ160I, XC4013XLAPQ208C, XC4013XLAPQ208I, XC4013XLAPQ240C, XC4013XLAPQ240I, XC4013XLABG256C, XC4013XLABG256I, XC4013XLAPQ160C, XC4013XLAPQ160I, XC4013XLAPQ208C, XC4013XLAPQ208I, XC4013XLAPQ240C, XC4013XLAPQ240I, XC4013XLABG256C, XC4013XLABG256I,

Xilinx XC4013XLA

Product Overview
Manufacturer Xilinx
Category FPGA

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Description

XC4000 Series high-performance, high-capacity Field Programmable Gate Arrays (FPGAs) provide the benefits of custom CMOS VLSI, while avoiding the initial cost, long development cycle, and inherent risk of a conventional masked gate array.

The result of fifteen years of FPGA design experience and feedback from thousands of customers, these FPGAs combine architectural versatility, increased speed, abundant routing resources, and new, sophisticated software to achieve fully automated implementation of complex, high-density, high-performance designs.

Features:

  • System-featured Field-Programmable Gate Arrays
    • Select-RAMTM memory: on-chip ultra-fast RAM with
      • Synchronous write option
      • Dual-port RAM option
    • Flexible function generators and abundant flip-flops
    • Dedicated high-speed carry logic
    • Internal 3-state bus capability
    • Eight global low-skew clock or signal distribution networks
  • Flexible Array Architecture
  • Low-power Segmented Routing Architecture
  • Systems-oriented Features
    • IEEE 1149.1-compatible boundary scan
    • Individually programmable output slew rate
    • Programmable input pull-up or pull-down resistors
    • Unlimited reprogrammability
  • Read Back Capability
    • Program verification and internal node observability