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RELATED DEVICE CODES:

XC2VP2, XC2VP4, XC2VP7, XC2VP20, XC2VPX20, XC2VP30, XC2VP40, XC2VP50, XC2VP70, XC2VPX70, XC2VP100, XQ2VP40, XQ2VP70,

RELATED MODEL NUMBERS:

XC2VP2-5FG256C, XC2VP2-5FG256I, XC2VP2-5FGG256C, XC2VP2-5FGG256I, XC2VP2-5FG456C, XC2VP2-5FG456I, XC2VP2-5FGG456C, XC2VP2-5FGG456I, XC2VP2-5 FF672C, XC2VP2-5 FF672I, XC2VP2-6FG256C, XC2VP2-6FG256I, XC2VP2-6FGG256C, XC2VP2-6FGG256I, XC2VP2-6FG456C, XC2VP2-6FG456I, XC2VP2-6FGG456C, XC2VP2-6FGG456I, XC2VP2-6 FF672C, XC2VP2-6 FF672I, XC2VP2-7FG256C, XC2VP2-7FG256I, XC2VP2-7FGG256C, XC2VP2-7FGG256I, XC2VP2-7FG456C, XC2VP2-7FG456I, XC2VP2-7FGG456C, XC2VP2-7FGG456I, XC2VP2-7 FF672C, XC2VP2-7 FF672I,

Xilinx XC2VP2

Product Overview
Manufacturer Xilinx
Category FPGA

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Description

The Virtex-II Pro and Virtex-II Pro X families contain platform FPGAs for designs that are based on IP cores and customized modules. The family incorporates multi-gigabit transceivers and PowerPC CPU blocks in Virtex-II Pro Series FPGA architecture. It empowers complete solutions for telecommunication, wireless, networking, video, and DSP applications.

The leading-edge 0.13 µm CMOS nine-layer copper process and Virtex-II Pro architecture are optimized for high performance designs in a wide range of densities. Combining a wide variety of flexible features and IP cores, the Virtex-II Pro family enhances programmable logic design capabilities and is a powerful alternative to mask-programmed gate arrays.

Features:

Summary of Virtex-II Pro™ / Virtex-II Pro X Features

  • High-Performance Platform FPGA Solution, Including
    • Up to twenty RocketIO™ or RocketIO X embedded Multi-Gigabit Transceivers (MGTs)
    • Up to two IBM PowerPC™ RISC processor blocks
  • Based on Virtex-II™ Platform FPGA Technology
    • Flexible logic resources
    • SRAM-based in-system configuration
    • Active Interconnect technology
    • SelectRAM™+ memory hierarchy
    • Dedicated 18-bit x 18-bit multiplier blocks
    • High-performance clock management circuitry
    • SelectI/O™-Ultra technology
    • XCITE Digitally Controlled Impedance (DCI) I/O

Virtex-II Pro / Virtex-II Pro X family members and resources are shown in Table 1.

XC2VP2XC2VP4XC2VP7XC2VP20XC2VPX20XC2VP30XC2VP40XC2VP50XC2VP70XC2VPX70XC2VP100
Device(1)RocketIO Transceiver BlocksPowerPC Processor BlocksLogic Cells(2)CLB (1 = 4 slices = max 128 bits)18 X 18 Bit Multiplier BlocksBlock SelectRAM+DCMsMaximum UserI/O Pads
SlicesMax Distr RAM (Kb)18 Kb BlocksMax Block RAM (Kb)
403,1681,4084412122164204
416,7683,0089428285044348
8111,0884,92815444447924396
8220,8809,28029088881,5848564
8(4)122,0329,79230688881,5848552
8230,81613,6964281361362,4488644
0(3), 8, or 12243,63219,3926061921923,4568804
0(3) or 16253,13623,6167382322324,1768852
16 or 20274,44833,0881,0343283285,9048996
20(4)274,44833,0881,0343083085,5448992
0(3) or 20299,21644,0961,3784444447,992121,164