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XQV100, XQV300, XQV600, XQV1000, XCV50, XCV100, XCV150, XCV200, XCV300, XCV400, XCV600, XCV800, XCV1000, XCV50,


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Xilinx XQV100

Product Overview
Manufacturer Xilinx
Category FPGA


Request Support for for Xilinx XQV100


The QPro? Virtex? FPGA family delivers high-performance, high-capacity programmable logic solutions. Dramatic increases in silicon efficiency result from optimizing the new architecture for place-and-route efficiency and exploiting an aggressive 5-layer-metal 0.22 ?m CMOS process. These advances make QPro Virtex FPGAs powerful and flexible alternatives to mask-programmed gate arrays. The Virtex family comprises the four members shown in Table 1.

Building on experience gained from previous generations of FPGAs, the Virtex family represents a revolutionary step forward in programmable logic design. Combining a wide variety of programmable system features, a rich hierarchy of fast, flexible interconnect resources, and advanced process technology, the QPro Virtex family delivers a high-speed and high-capacity programmable logic solution that enhances design flexibility while reducing time-to-market.

Refer to the ?Virtex? 2.5V Field Programmable Gate Arrays? commercial data sheet for more information on device architecture and timing specifications.


  • Certified to MIL-PRF-38535 (Qualified Manufacturer Listing)
  • Guaranteed over the full military temperature range (?55?C to +125?C)
  • Ceramic and Plastic Packages
  • Fast, high-density Field-Programmable Gate Arrays
    • Densities from 100K to 1M system gates
    • System performance up to 200 MHz
    • Hot-swappable for Compact PCI
  • Multi-standard SelectI/O? interfaces
    • 16 high-performance interface standards
    • Connects directly to ZBTRAM devices
  • Built-in clock-management circuitry
    • Four dedicated delay-locked loops (DLLs) for advanced clock control
    • Four primary low-skew global clock distribution nets, plus 24 secondary global nets
  • Hierarchical memory system
    • LUTs configurable as 16-bit RAM, 32-bit RAM, 16-bit dual-ported RAM, or 16-bit Shift Register
    • Configurable synchronous dual-ported 4K-bit RAMs
    • Fast interfaces to external high-performance RAMs
  • Flexible architecture that balances speed and density
    • Dedicated carry logic for high-speed arithmetic
    • Dedicated multiplier support
    • Cascade chain for wide-input functions
    • Abundant registers/latches with clock enable, and dual synchronous/asynchronous set and reset
    • Internal 3-state bussing
    • IEEE 1149.1 boundary-scan logic
    • Die-temperature sensing device
  • Supported by FPGA Foundation? and Alliance Development Systems
    • Complete support for Unified Libraries, Relationally Placed Macros, and Design Manager
    • Wide selection of PC and workstation platforms
  • SRAM-based in-system configuration
    • Unlimited reprogrammability
    • Four programming modes
  • 0.22 ?m 5-layer metal process
  • 100% factory tested
  • Available to Standard Microcircuit Drawings
    • 5962-99572 for XQV300
    • 5962-99573 for XQV600
    • 5962-99574 for XQV1000
    • Contact Defense Supply Center Columbus (DSCC) for more information at http://www.dscc.dla.mil